A. Borg, Mikael Patel, K. Sandahl.
In: .
2007
B. Gallina, N. Guelfi.
In: .
2007
Anders Henriksson, Yiori Yi, B. Ronald Frost, M. Middleton.
In: Electron. Gov. an Int. J..
2007
Thomas Olsson.
In: .
2007
M. R. Kakoee, H. Shojaei, Hassan Ghasemzadeh, M. Sirjani, Z. Navabi.
In: 2007 IEEE International Symposium on Circuits and Systems.
2007
Abstract:
Transaction level modeling allows exploring several SoC design architectures leading to better performance and easier verification of the final product. In this paper, we present an approach for design and verification of transaction level models. Verification is integrated as part of the design-flow. In the proposed method, we first model the design in UML. Then, we translate it into the reactive...
M. Staron.
In: 29th International Conference on Software Engineering (ICSE'07).
2007
I. Crnkovic, Lars Grunske.
In: 29th International Conference on Software Engineering (ICSE'07 Companion).
2007
Jorge Aranda, Neil A. Ernst, J. Horkoff, S. Easterbrook.
In: International Workshop on Modeling in Software Engineering (MISE'07: ICSE Workshop 2007).
2007
Petter Johansson, Lars Hall, Agneta Gulz, Magnus Haake, Katsumi Watanabe.
In: .
2007
Mikael Åkerholm, Jan Carlson, J. Fredriksson, H. Hansson, John Håkansson et al.
In: J. Syst. Softw..
2007
R. Land, I. Crnkovic.
In: Inf. Softw. Technol..
2007
F. Arbab, M. Sirjani.
In: .
2007
N. Razavi, M. Sirjani.
In: .
2007
M. Ekman, Henrik Thane.
In: 13th IEEE Real Time and Embedded Technology and Applications Symposium (RTAS'07).
2007